cpu Model Interface¶
CPU capabilities.
arch
must be one of:
x86
x86_64
PPC
PPC64
ARM7
MIPS
Variables¶
Name | Type | Description | Required | Constant |
---|---|---|---|---|
arch |
str | CPU Architecture | ||
cores |
int | Effective number of cores. For bigLITTLE and similar, the maximal number of cores which may work similtaneously | ||
ht |
bool | Hyper-Threading support | ||
freq |
int | Nominal frequence in MHz | ||
turbo_freq |
int | Maximal frequence in MHz | ||
l1_cache |
int | L1 cache size in kb | ||
l2_cache |
int | L2 cache size in kb | ||
l3_cache |
int | L3 cache size in kb |